/*
 * Arm SCP/MCP Software
 * Copyright (c) 2020-2021, Arm Limited and Contributors. All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

#ifndef SCP_CSS_MMAP_H
#define SCP_CSS_MMAP_H

#include "scp_mmap.h"

#define SCP_CMN_BOOKER_BASE (SCP_SYSTEM_ACCESS_PORT0_BASE + 0x10000000)

#define SCP_REFCLK_CNTCONTROL_BASE (SCP_SYSTEM_ACCESS_PORT1_BASE + 0x2A430000)
#define SCP_REFCLK_CNTCTL_BASE (SCP_PERIPHERAL_BASE + 0x0000)
#define SCP_REFCLK_CNTBASE0_BASE (SCP_PERIPHERAL_BASE + 0x1000)
#define SCP_UART_BOARD_BASE (SCP_SYSTEM_ACCESS_PORT0_BASE + 0x3FF70000)
#define SCP_MHU_AP_BASE (SCP_PERIPHERAL_BASE)

#define SCP_PIK_SCP_BASE (SCP_ELEMENT_MANAGEMENT_PERIPHERAL_BASE)
#define SCP_PIK_CLUSTER_BASE(n) \
    ((SCP_ELEMENT_MANAGEMENT_PERIPHERAL_BASE + 0x60000) + ((n)*0x20000))
#define SCP_PIK_SYSTEM_BASE (SCP_ELEMENT_MANAGEMENT_PERIPHERAL_BASE + 0x40000)

#define SCP_PIK_DPU_BASE (SCP_ELEMENT_MANAGEMENT_PERIPHERAL_BASE + 0xE0000)

#define SCP_UTILITY_BUS_BASE \
    (SCP_ELEMENT_MANAGEMENT_PERIPHERAL_BASE + 0x1000000)
#define SCP_PPU_CLUSTER_BASE (SCP_UTILITY_BUS_BASE + 0x30000)
#define SCP_PPU_CORE_BASE(n) (SCP_UTILITY_BUS_BASE + 0x80000 + (n * 0x100000))

#define SCP_MPMM_BASE         (SCP_UTILITY_BUS_BASE + 0xB0000)
#define SCP_MPMM_CORE_BASE(n) (SCP_MPMM_BASE + ((n)*0x100000))

#define SCP_AMU_BASE          (SCP_UTILITY_BUS_BASE + 0x90000)
#define SCP_AMU_CORE_BASE(n)  (SCP_AMU_BASE + ((n)*0x100000))
#define SCP_AMU_AMEVCNTR0X(n) (SCP_AMU_CORE_BASE(n) + 0x0)
#define SCP_AMU_AMEVCNTR1X(n) (SCP_AMU_CORE_BASE(n) + 0x100)

#define SCP_PPU_SYS0_BASE (SCP_PIK_SYSTEM_BASE + 0x1000)
#define SCP_PPU_SYS1_BASE (SCP_PIK_SYSTEM_BASE + 0x5000)

#define SCP_MHU_SCP_AP_RCV_NS_CLUS0 (SCP_MHU_AP_BASE + 0x2000)
#define SCP_MHU_SCP_AP_SND_NS_CLUS0 (SCP_MHU_AP_BASE + 0x3000)
#define SCP_MHU_SCP_AP_RCV_S_CLUS0 (SCP_MHU_AP_BASE + 0x4000)
#define SCP_MHU_SCP_AP_SND_S_CLUS0 (SCP_MHU_AP_BASE + 0x5000)

#endif /* SCP_CSS_MMAP_H */
